BR25H256FVT-5AC
256 KBit, SPI-BUS, Hochgeschwindigkeits-Schreibzyklus, Hochlast-Serien-EEPROM für die Automobilindustrie (125℃-Betrieb)

Die BR25H256xxx-5AC-Serie besteht aus seriellen 256 Kbit EEPROM für die SPI-BUS-Schnittstelle

Produktdetails

 
Teilenummer | BR25H256FVT-5ACE2
Status | Empfohlen
Gehäuse | TSSOP-B8
Gehäusetyp | Taping
Einheitenmenge | 3000
Minimale Gehäusemenge | 3000
RoHS | Ja
Product Longevity Program | 10 Years

Funktionalen Sicherheit:

Kategorie : FS supportive
A product that has been developed for automotive use and is capable of supporting safety analysis with regard to the functional safety.

Spezifikationen:

Series

BR25H-5AC

Density [bit]

256K

Bit Format [Word x Bit]

32K x 8

Vcc(Min.)[V]

1.7

Vcc(Max.)[V]

5.5

Circuit Current (Max.)[mA]

8

Standby Current (Max.)[μA]

10

Write Cycle (Max.)[ms]

3.5

Input Frequency (Max.)[Hz]

20M

Endurance (Max.)[Cycle]

4x106

Data Retention (Max.)[Year]

100

I/F

SPI BUS

Operating Temperature (Min.)[°C]

-40

Operating Temperature (Max.)[°C]

125

Package Size [mm]

3x6.4 (t=1.2)

Common Standard

AEC-Q100 (Automotive Grade)

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Eigenschaften:

  • AEC-Q100 Qualified (Grade 1)
  • SPI BUS Mode (CPOL, CPHA) = (0, 0), (1, 1)
  • Page Size: 64 Byte
  • Bit Format: 32768 x 8 bit
  • 64Byte Write Lockable Identification Page (ID Page)
  • Address Auto Increment Function at Read Operation
  • Auto Erase and Auto End Function at Data Rewrite
  • Write Protect Block Setting by Software
    Memory Array 1/4, 1/2, Whole
  • HOLD Function by the HOLDB Pin
  • Prevention of Write Mistake
    Write Prohibition at Power On
    Write Prohibition by the WPB Pin
    Write Prohibition Block Setting
    Prevention of Write Mistake at Low Voltage
  • Data at Shipment
    Memory Array: FFh
    ID Page First 3 Addresses: 2Fh, 00h, 0Fh
    Other Addresses: FFh
    Status Register WPEN, BP1, BP0: 0, 0, 0
    Lock Status LS: 0
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