ROHM FAQ

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FAQ's
  • For Window voltage detector ICs with adjustable delay time,
    why does not occur set release delay time when under voltage release?
    • In case of VSENSE exceeds under voltage release voltage and over voltage detection voltage from under voltage detection state, set release delay time does not occur and UVB immediately switched to "H" when it exceeds over voltage detection voltage if transition time is earlier than set release delay time.
      This is specification of Window voltage detector IC as stated below.
      UVB is assumed to be already "H" at exceeding over voltage detection voltage as described Timing Chart on Datasheet P.9.
      So, UVB immediately swithed to "H" when VSENSE exceeds over voltage detection voltage even though release delay time does not pass.
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